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properly clear and enable interrupts

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This commit is contained in:
Daniel Borges
2019-01-04 14:54:08 +01:00
parent dfedb739b9
commit b2cdcc65fe
1 changed files with 3 additions and 3 deletions
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6
Code/render.asm
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@@ -1,4 +1,5 @@
INCLUDE "hardware.inc" INCLUDE "hardware.inc"
INCLUDE "utils.inc"
RENDER_IN_HBL EQU 0 RENDER_IN_HBL EQU 0
@@ -126,9 +127,7 @@ ELSE
ld a, IEF_VBLANK ld a, IEF_VBLANK
ENDC ENDC
ld [rIE], a ld [rIE], a
xor a ClearAndEnableInterrupts
ei
ldh [rIF], a
ret ret
@@ -141,6 +140,7 @@ WaitRender:
halt halt
jr WaitRender jr WaitRender
di
IF RENDER_IN_HBL != 0 IF RENDER_IN_HBL != 0
; enable only v-blank interrupt and wait for vbl ; enable only v-blank interrupt and wait for vbl
ld a, IEF_VBLANK ld a, IEF_VBLANK